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Eon Silicon Solution Inc. EN25F32-100HIP Даташит, EN25F32-100HIP PDF, даташитов

GENERAL DESCRIPTION
The EN25F32 is a 32M-bit (4096K-byte) Serial Flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25F32 is designed to allow either single Sector/Block at a time or full chip erase operation. The EN25F32 can be configured to protect part of the memory as the software protected mode. The device can sustain a minimum of 100K program/erase cycles on each sector or block.

FEATURES
• Single power supply operation
– Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• 32 Mbit Serial Flash
– 32 M-bit/4096 K-byte/16384 pages
– 256 bytes per programmable page
• High performance
– 100MHz clock rate
• Low power consumption
– 12 mA typical active current

– 1 μA typical power down current
• Uniform Sector Architecture:
– 1024 sectors of 4-Kbyte
– 64 blocks of 64-Kbyte
– Any sector or block can be erased individually
• Software and Hardware Write Protection:
– Write Protect all or portion of memory via software
– Enable/Disable protection with WP# pin
• High performance program/erase speed
– Page program time: 1.3ms typical
– Sector erase time: 90ms typical
– Block erase time 500ms typical
– Chip erase time: 25 Seconds typical
• Lockable 512 byte OTP security sector
• Minimum 100K endurance cycle
• Package Options
– 8 pins SOP 200mil body width
– 8 contact VDFN
– 8 pins PDIP
– 16 pin SOP 300mil body width
– All Pb-free packages are RoHS compliant
• Industrial temperature Range

ru.datasheetbank.com

Eon Silicon Solution Inc. EN25F32-100HIP Даташит, EN25F32-100HIP PDF, даташитов

GENERAL DESCRIPTION
The EN25F32 is a 32M-bit (4096K-byte) Serial Flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25F32 is designed to allow either single Sector/Block at a time or full chip erase operation. The EN25F32 can be configured to protect part of the memory as the software protected mode. The device can sustain a minimum of 100K program/erase cycles on each sector or block.

FEATURES
• Single power supply operation
– Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• 32 Mbit Serial Flash
– 32 M-bit/4096 K-byte/16384 pages
– 256 bytes per programmable page
• High performance

– 100MHz clock rate
• Low power consumption
– 12 mA typical active current
– 1 μA typical power down current
• Uniform Sector Architecture:
– 1024 sectors of 4-Kbyte
– 64 blocks of 64-Kbyte
– Any sector or block can be erased individually
• Software and Hardware Write Protection:
– Write Protect all or portion of memory via software
– Enable/Disable protection with WP# pin
• High performance program/erase speed
– Page program time: 1.3ms typical
– Sector erase time: 90ms typical
– Block erase time 500ms typical
– Chip erase time: 25 Seconds typical
• Lockable 512 byte OTP security sector
• Minimum 100K endurance cycle
• Package Options
– 8 pins SOP 200mil body width
– 8 contact VDFN
– 8 pins PDIP
– 16 pin SOP 300mil body width
– All Pb-free packages are RoHS compliant
• Industrial temperature Range

ru.datasheetbank.com

EN25F32-100HIP PDF, EN25F32-100HIP Даташит, даташитов

GENERAL DESCRIPTION
The EN25F32 is a 32M-bit (4096K-byte) Serial Flash memory, with advanced write protection mechanisms, accessed by a high speed SPI-compatible bus. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction.
The EN25F32 is designed to allow either single Sector/Block at a time or full chip erase operation. The EN25F32 can be configured to protect part of the memory as the software protected mode. The device can sustain a minimum of 100K program/erase cycles on each sector or block.

FEATURES
• Single power supply operation
– Full voltage range: 2.7-3.6 volt
• Serial Interface Architecture
– SPI Compatible: Mode 0 and Mode 3
• 32 Mbit Serial Flash

– 32 M-bit/4096 K-byte/16384 pages
– 256 bytes per programmable page
• High performance
– 100MHz clock rate
• Low power consumption
– 12 mA typical active current
– 1 μA typical power down current
• Uniform Sector Architecture:
– 1024 sectors of 4-Kbyte
– 64 blocks of 64-Kbyte
– Any sector or block can be erased individually
• Software and Hardware Write Protection:
– Write Protect all or portion of memory via software
– Enable/Disable protection with WP# pin
• High performance program/erase speed
– Page program time: 1.3ms typical
– Sector erase time: 90ms typical
– Block erase time 500ms typical
– Chip erase time: 25 Seconds typical
• Lockable 512 byte OTP security sector
• Minimum 100K endurance cycle
• Package Options
– 8 pins SOP 200mil body width
– 8 contact VDFN
– 8 pins PDIP
– 16 pin SOP 300mil body width
– All Pb-free packages are RoHS compliant
• Industrial temperature Range

ru.datasheetq.com

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